TS3_3=IDLE_THERE_IS_NO_TR, TCS3_3=INCOMPLETE_THE_PREV, TCS2_2=INCOMPLETE_THE_PREV, TS1_1=IDLE_THERE_IS_NO_TR, TBS1_1=LOCKED_SOFTWARE_CAN, TBS3_3=LOCKED_SOFTWARE_CAN, TCS1_1=INCOMPLETE_THE_PREV, TBS2_2=LOCKED_SOFTWARE_CAN, TS2_2=IDLE_THERE_IS_NO_TR
Status Register
RBS_1 | Receive Buffer Status. This bit is identical to the RBS bit in the CANxGSR. |
DOS_1 | Data Overrun Status. This bit is identical to the DOS bit in the CANxGSR. |
TBS1_1 | Transmit Buffer Status 1. 0 (LOCKED_SOFTWARE_CAN): Locked. Software cannot access the Tx Buffer 1 nor write to the corresponding CANxTFI, CANxTID, CANxTDA, and CANxTDB registers because a message is either waiting for transmission or is in transmitting process. 1 (RELEASED_SOFTWARE_M): Released. Software may write a message into the Transmit Buffer 1 and its CANxTFI, CANxTID, CANxTDA, and CANxTDB registers. |
TCS1_1 | Transmission Complete Status. 0 (INCOMPLETE_THE_PREV): Incomplete. The previously requested transmission for Tx Buffer 1 is not complete. 1 (COMPLETE_THE_PREVIO): Complete. The previously requested transmission for Tx Buffer 1 has been successfully completed. |
RS_1 | Receive Status. This bit is identical to the RS bit in the GSR. |
TS1_1 | Transmit Status 1. 0 (IDLE_THERE_IS_NO_TR): Idle. There is no transmission from Tx Buffer 1. 1 (TRANSMIT_THE_CAN_CO): Transmit. The CAN Controller is transmitting a message from Tx Buffer 1. |
ES_1 | Error Status. This bit is identical to the ES bit in the CANxGSR. |
BS_1 | Bus Status. This bit is identical to the BS bit in the CANxGSR. |
RBS_2 | Receive Buffer Status. This bit is identical to the RBS bit in the CANxGSR. |
DOS_2 | Data Overrun Status. This bit is identical to the DOS bit in the CANxGSR. |
TBS2_2 | Transmit Buffer Status 2. 0 (LOCKED_SOFTWARE_CAN): Locked. Software cannot access the Tx Buffer 2 nor write to the corresponding CANxTFI, CANxTID, CANxTDA, and CANxTDB registers because a message is either waiting for transmission or is in transmitting process. 1 (RELEASED_SOFTWARE_M): Released. Software may write a message into the Transmit Buffer 2 and its CANxTFI, CANxTID, CANxTDA, and CANxTDB registers. |
TCS2_2 | Transmission Complete Status. 0 (INCOMPLETE_THE_PREV): Incomplete. The previously requested transmission for Tx Buffer 2 is not complete. 1 (COMPLETE_THE_PREVIO): Complete. The previously requested transmission for Tx Buffer 2 has been successfully completed. |
RS_2 | Receive Status. This bit is identical to the RS bit in the GSR. |
TS2_2 | Transmit Status 2. 0 (IDLE_THERE_IS_NO_TR): Idle. There is no transmission from Tx Buffer 2. 1 (TRANSMIT_THE_CAN_CO): Transmit. The CAN Controller is transmitting a message from Tx Buffer 2. |
ES_2 | Error Status. This bit is identical to the ES bit in the CANxGSR. |
BS_2 | Bus Status. This bit is identical to the BS bit in the CANxGSR. |
RBS_3 | Receive Buffer Status. This bit is identical to the RBS bit in the CANxGSR. |
DOS_3 | Data Overrun Status. This bit is identical to the DOS bit in the CANxGSR. |
TBS3_3 | Transmit Buffer Status 3. 0 (LOCKED_SOFTWARE_CAN): Locked. Software cannot access the Tx Buffer 3 nor write to the corresponding CANxTFI, CANxTID, CANxTDA, and CANxTDB registers because a message is either waiting for transmission or is in transmitting process. 1 (RELEASED_SOFTWARE_M): Released. Software may write a message into the Transmit Buffer 3 and its CANxTFI, CANxTID, CANxTDA, and CANxTDB registers. |
TCS3_3 | Transmission Complete Status. 0 (INCOMPLETE_THE_PREV): Incomplete. The previously requested transmission for Tx Buffer 3 is not complete. 1 (COMPLETE_THE_PREVIO): Complete. The previously requested transmission for Tx Buffer 3 has been successfully completed. |
RS_3 | Receive Status. This bit is identical to the RS bit in the GSR. |
TS3_3 | Transmit Status 3. 0 (IDLE_THERE_IS_NO_TR): Idle. There is no transmission from Tx Buffer 3. 1 (TRANSMIT_THE_CAN_CO): Transmit. The CAN Controller is transmitting a message from Tx Buffer 3. |
ES_3 | Error Status. This bit is identical to the ES bit in the CANxGSR. |
BS_3 | Bus Status. This bit is identical to the BS bit in the CANxGSR. |
RESERVED | Reserved, the value read from a reserved bit is not defined. |